SOC Design Verification Engineer - High-Impact HPC

Advanced Micro Devices, Inc.; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Advanced Micro Devices, Inc. is seeking an adaptive design verification engineer in San Jose, CA. You will contribute to SOC-level verification, develop tests for functional and performance checks, and build testbench components for next-generation IP.

Strong communication and collaboration across sites are essential as you solve complex verification challenges. The role requires expertise in Verilog/SystemVerilog, UVM, and C/C++, with scripting in Perl or Python.

Qualifications

• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
• Experience with SOC verification workflows and methodologies.
• Strong understanding of processor architecture and debug techniques.

Responsibilities

• Develop and maintain tests for functional and performance verification at the core and SOC level.
• Build testbench components to support next-generation IP.
• Maintain and improve test libraries for IP-level testing.
• Close verification quality metrics like pass rates and code coverage.
• Provide technical support to other teams.

Skills

Verilog/SystemVerilog

UVM

C/C++

Perl/Python scripting

SOC architecture

CPU/DSP processors

Excellent communication

Education

Bachelor's or Master's in Computer Engineering or Electrical Engineering

Job description

Advanced Micro Devices, Inc. is seeking an adaptive design verification engineer in San Jose, CA. You will contribute to SOC-level verification, develop tests for functional and performance checks, and build testbench components for next-generation IP.

Strong communication and collaboration across sites are essential as you solve complex verification challenges. The role requires expertise in Verilog/SystemVerilog, UVM, and C/C++, with scripting in Perl or Python.