SoC Verification Engineer - Drive Next-Gen Processors

AMD; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD is seeking an adaptive design verification engineer in San Jose to join a SOC team driving high-quality, industry-leading technologies to market.

You will develop/maintain tests, build testbench components, and support IP-level verification while collaborating across global teams. Strong coding in Verilog/SystemVerilog, UVM, and C/C++ is required, with good problem-solving and communication skills.

Qualifications

• Passion for modern, complex processor architecture and verification
• Strong communication and teamwork across sites/time zones
• Analytical problem solving and attention to detail
• Familiarity with design flow and verification concepts

Responsibilities

• Develop/maintain tests for functional and performance verification at core and SOC levels
• Build testbench components for next-generation IP
• Maintain/improve test libraries for IP-level testing
• Close verification quality metrics: pass rates, code coverage, functional coverage

Skills

Verilog

SystemVerilog

UVM

C/C++

Python

Education

Bachelor's or Master's in Computer Engineering/Electrical Engineering

Tools

AXI

AHB

PCIe

DDR

Job description

AMD is seeking an adaptive design verification engineer in San Jose to join a SOC team driving high-quality, industry-leading technologies to market.

You will develop/maintain tests, build testbench components, and support IP-level verification while collaborating across global teams. Strong coding in Verilog/SystemVerilog, UVM, and C/C++ is required, with good problem-solving and communication skills.