Silicon Design & Verification Engineer

Advanced Micro Devices, Inc.; San Jose (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

A leading technology firm in San Jose, CA is seeking a Silicon Design Verification Engineer to join their team. In this role, you will create test plans, design testbenches using System Verilog and UVM, and enhance verification environments. Ideal candidates have a Master's degree in computer or electrical engineering and experience in digital design and verification methodologies. This position requires strong analytical skills and the ability to work collaboratively in a team-oriented environment.

Qualifications

• Passion for modern, complex processor architecture and digital design.
• Excellent communication skills and strong analytical abilities.
• Willingness to learn and tackle problems effectively.

Responsibilities

• Create test plans for complex IP designs with senior engineers.
• Design testbenches in System Verilog and UVM.
• Create and enhance verification environments using SVA.
• Debug tests with design engineers to ensure design accuracy.
• Coordinate with RTL engineers on logic design for better clock gating.
• Manage verification quality metrics like pass rates and coverage.

Skills

System Verilog

C++

Python scripting

UVM verification methodology

Digital design

Education

Master's degree in computer engineering/Electrical Engineering

Job description

A leading technology firm in San Jose, CA is seeking a Silicon Design Verification Engineer to join their team. In this role, you will create test plans, design testbenches using System Verilog and UVM, and enhance verification environments. Ideal candidates have a Master's degree in computer or electrical engineering and experience in digital design and verification methodologies. This position requires strong analytical skills and the ability to work collaboratively in a team-oriented environment.