A technology firm in San Jose is seeking a Design Verification Engineer to create and implement verification plans. The ideal candidate will have a Master's in Computer Science or a related field and at least one year of relevant experience. Responsibilities include collaborating with design teams, developing test cases, and driving verification processes to ensure product quality. The position offers a competitive salary range of $156,853 to $160,000 per year and requires some travel.
Qualifications
Master’s degree in relevant field or foreign equivalent.
1 year of experience in related roles.
Travel may be required (10-15%).
Responsibilities
Collaborate with teams on product requirements.
Create a comprehensive verification plan.
Drive design verification to closure.
Prepare reports on the verification process.
Skills
Verification strategies
Functional coverage
Code coverage
Test cases development
Education
Master’s in Computer Science or related field
Tools
System Verilog
Job description
A technology firm in San Jose is seeking a Design Verification Engineer to create and implement verification plans. The ideal candidate will have a Master's in Computer Science or a related field and at least one year of relevant experience. Responsibilities include collaborating with design teams, developing test cases, and driving verification processes to ensure product quality. The position offers a competitive salary range of $156,853 to $160,000 per year and requires some travel.