Senior Video Codec ASIC Verification Engineer (HLS/RTL)

Google LLC; Mountain View (CA); On-site; USD 163,000 - 236,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

Google LLC in Mountain View, CA is seeking a Senior Silicon Design Verification Engineer for YouTube Video Accelerators to lead verification across C/C++ and RTL, bridging algorithmic intent with hardware implementation.

You will oversee HLS workflows, develop C++ testbenches, and drive end-to-end verification strategies in a fast-paced, collaborative environment focused on high-performance video codecs and hardware acceleration.

Qualifications

• 8+ years of Design Verification experience.
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Responsibilities

• Lead comprehensive verification strategies and signoff for complex blocks, from HLS code to RTL.
• Design and maintain verification environments using C/C++ GoogleTest and SystemVerilog/UVM.
• Apply HLS methods including C/RTL co-simulation and formal equivalence verification.
• Perform extensive bug hunting and coverage analysis across C++ and RTL domains.
• Mentor junior engineers on HLS verification and improve verification methodologies.

Skills

SystemVerilog

UVM

C/C++

Video processing

Video codecs

RTL debugging

Education

Bachelor's degree or equivalent

Master's/PhD preferred

Tools

Catapult

Vivado

XLS

VCS

Xcelium

Verdi

Job description

Google LLC in Mountain View, CA is seeking a Senior Silicon Design Verification Engineer for YouTube Video Accelerators to lead verification across C/C++ and RTL, bridging algorithmic intent with hardware implementation.

You will oversee HLS workflows, develop C++ testbenches, and drive end-to-end verification strategies in a fast-paced, collaborative environment focused on high-performance video codecs and hardware acceleration.