Senior Verification Engineer: Multimedia/AI/ML Silicon

Google Inc.; Mountain View (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google Mountain View, CA is hiring a Senior Design Verification Engineer focused on Multimedia/AI/ML hardware. You will collaborate across architecture, design, and DV teams to define test plans and drive DV status through the development cycle.

Responsibilities include creating constrained-random verification environments using SystemVerilog and UVM, verifying IPs and subsystems, and guiding verification toward tape-out with comprehensive coverage metrics.

Qualifications

• Bachelor’s degree in electrical engineering or computer science, or equivalent practical experience.
• 8 years of experience with verification methodologies and languages (e.g., UVM and SystemVerilog).
• Experience with interconnect protocols (e.g., AXI, APB, ACE).
• Experience developing and maintaining verification testbenches, test cases, and test environments.

Responsibilities

• Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process.
• Plan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios.
• Work with architecture, software, design, and back-end implementation stakeholders to make technical decisions.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM. Identify and implement improvements to the verification methodologies.
• Identify verification gaps and demonstrate advancement towards tape-out through comprehensive coverage metrics. Debug tests with design engineers to deliver functionally correct design blocks.

Skills

Bachelor's degree

8 years experience

UVM

SystemVerilog

Interconnect protocols

Testbenches

Education

Bachelor's degree in EE/CS

Master/PhD preferred

Tools

SystemVerilog

UVM

Job description

Google Mountain View, CA is hiring a Senior Design Verification Engineer focused on Multimedia/AI/ML hardware. You will collaborate across architecture, design, and DV teams to define test plans and drive DV status through the development cycle.

Responsibilities include creating constrained-random verification environments using SystemVerilog and UVM, verifying IPs and subsystems, and guiding verification toward tape-out with comprehensive coverage metrics.