Senior RTL Verification Lead - Multimedia IP and SoC

Google; Mountain View (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google is hiring for a senior verification role focused on RTL verification of complex ISP/Multimedia hardware. You will lead IP- and subsystem-level verification, collaborate with architecture and design teams, and drive full-chip integration efforts.

The position emphasizes power/performance verification, UVM-based testbenches, and cross-team mentorship. The role involves coordinating global DV activities, advancing coverage, and ensuring readiness toward tape-out.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
• 4 years of experience in people management, developing employees.
• Experience constructing reusable verification components and environments using UVM.
• Experience leading fully functional verification and performance validation cycle of subsystems such as Camera ML/Multimedia - ISP, Display, TPU/GPU, processors, or at the SOC level.

Responsibilities

• Plan and execute IP- and subsystem-level verification for complex ISP/Multimedia hardware, partnering with architecture and design teams to identify critical scenarios and support full-chip integration.
• Lead subsystem verification for power and performance, including low-power design, embedded processor integration, and DVFS features.
• Build and enhance SystemVerilog/UVM constrained-random testbenches, debugging failures alongside designers to ensure functionally robust blocks.
• Define, measure, and close comprehensive coverage across stimulus and corner cases to eliminate verification holes and drive progress toward tape-out.
• Manage and mentor a global DV team across methodology, scheduling, regressions, and reviews, while aligning with SoC teams to track all milestone deliverables.

Skills

RTL verification

SystemVerilog

UVM

People management

HW/SW interfacing

Education

Bachelor's degree or equivalent

Master's degree or PhD (preferred)

Tools

SystemVerilog Assertions (SVA)

Job description

Google is hiring for a senior verification role focused on RTL verification of complex ISP/Multimedia hardware. You will lead IP- and subsystem-level verification, collaborate with architecture and design teams, and drive full-chip integration efforts.

The position emphasizes power/performance verification, UVM-based testbenches, and cross-team mentorship. The role involves coordinating global DV activities, advancing coverage, and ensuring readiness toward tape-out.