Senior Multimedia Verification Lead (RTL/ASIC)

Google Inc.; San Diego, Mountain View (CA, CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google Inc. in San Diego seeks a Share Multimedia Design Verification Lead to drive IP- and subsystem-level verification for complex multimedia hardware across ISP, Display, TPU/GPU, and SOC blocks.

You will build robust UVM environments and lead a team to ensure full-chip integration with strong coverage strategies. The role partners with architecture and design teams, mentors a global DV group, and emphasizes power/performance verification, DVFS flows, and low-power techniques to deliver

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
• 10 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
• 4 years of experience in people management, developing employees.
• Experience constructing reusable verification components and environments using UVM.
• Experience leading verification and performance validation of subsystems such as Camera ML/Multimedia ISP, Display, TPU/GPU, processors, or SOC level.

Responsibilities

• Plan and execute IP- and subsystem-level verification for complex ISP/Multimedia hardware with architecture and design partners.
• Lead subsystem verification for power and performance, including low-power design, DVFS, and embedded processor integration.
• Build and enhance SystemVerilog/UVM constrained-random testbenches and debug failures with designers.
• Define, measure, and close coverage across stimulus and corner cases to prevent verification holes.
• Manage and mentor a global DV team, coordinating with SoC teams to track milestones.

Skills

SystemVerilog

RTL verification

People management

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field or equivalent practical experience

Tools

UVM

SystemVerilog Assertions (SVA)

Formal verification

Job description

Google Inc. in San Diego seeks a Share Multimedia Design Verification Lead to drive IP- and subsystem-level verification for complex multimedia hardware across ISP, Display, TPU/GPU, and SOC blocks.

You will build robust UVM environments and lead a team to ensure full-chip integration with strong coverage strategies. The role partners with architecture and design teams, mentors a global DV group, and emphasizes power/performance verification, DVFS flows, and low-power techniques to deliver