Senior TPU Compute RTL Design Engineer for AI/ML Hardware

Google LLC; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

Google LLC in Sunnyvale, CA seeks a Share Senior RTL Design Engineer for TPU Compute to shape AI/ML hardware acceleration. You will drive cutting‑edge TPU technology, develop custom silicon, and verify complex digital designs with a focus on TPU architecture and integration in AI/ML systems.

You will contribute to data center accelerators, participate in design, architecture, documentation and implementation of next‑gen accelerators.

Qualifications

• Bachelor's degree or equivalent practical experience.
• 8 years of experience with digital design using SystemVerilog RTL.
• Experience with power, performance and area optimizations.

Responsibilities

• Create and own microarchitecture for Compute accelerator IPs.
• Develop implement, and maintain design blocks or components.
• Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
• Work with design verification and validation teams to create testplans to verify, and debug design RTL.
• Work with physical design teams to ensure design meets physical requirements and timing closure.

Skills

SystemVerilog RTL

Power Optimization

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science with emphasis on computer architecture

Job description

Google LLC in Sunnyvale, CA seeks a Share Senior RTL Design Engineer for TPU Compute to shape AI/ML hardware acceleration. You will drive cutting‑edge TPU technology, develop custom silicon, and verify complex digital designs with a focus on TPU architecture and integration in AI/ML systems.

You will contribute to data center accelerators, participate in design, architecture, documentation and implementation of next‑gen accelerators.