Senior SoC Physical Design Architect – Tapeout Leader

Synopsys, Inc.; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Synopsys, Inc. in Austin, TX is seeking an experienced physical design engineer to lead full-chip and block-level implementations at advanced nodes. You will own floorplanning, placement, routing, timing, and signoff, collaborating with design teams and customers to ensure PPA targets are met.

This role emphasizes automation and mentorship to drive scalable methodologies. You will apply deep expertise in 5nm/3nm processes, work with Fusion Compiler, PrimeTime, and IC Validator, and mentor

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering.
• A track record of multiple successful tapeouts at advanced nodes.
• Deep expertise in floorplanning and physical verification.

Responsibilities

• Lead full-chip and block-level physical implementation from RTL through GDSII tapeout.
• Define floorplanning, power planning, placement, clock tree synthesis, routing, and signoff strategies to hit PPA targets.
• Drive timing closure, power optimization, congestion reduction, and area improvement.
• Perform and review static timing analysis, ECO implementation, IR-drop analysis, electromigration checks, and physical verification using IC Validator.
• Work directly with semiconductor customers to enable their success and deliver technical workshops.
• Develop automation scripts using Python, Tcl, and shell scripting to improve design productivity.
• Leverage AI and ML-based physical design technologies including DSO.ai and Fusion Compiler optimizations to accelerate closure.
• Mentor and elevate junior engineers, building technical depth across the team.

Skills

Floorplanning

Power planning

Place and route

Clock tree synthesis

Timing closure

IR-drop analysis

Electromigration

ECO methodologies

Python scripting

Automation tooling

Education

Bachelor's or Master's in EE/CE

Tools

Fusion Compiler

PrimeTime

IC Validator

StarRC

Formality

PrimePower

Job description

Synopsys, Inc. in Austin, TX is seeking an experienced physical design engineer to lead full-chip and block-level implementations at advanced nodes. You will own floorplanning, placement, routing, timing, and signoff, collaborating with design teams and customers to ensure PPA targets are met.

This role emphasizes automation and mentorship to drive scalable methodologies. You will apply deep expertise in 5nm/3nm processes, work with Fusion Compiler, PrimeTime, and IC Validator, and mentor