Senior Staff Engineer, Applications (Physical Design)

Synopsys, Inc.; San Diego (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Synopsys, Inc. is seeking an experienced ASIC physical design engineer in San Diego to drive tapeout-ready implementations. You will work on 7nm and below nodes, writing TCL and Python to automate flows, and balancing PPA with schedule and resources.

You will collaborate with R&D and field teams to translate customer needs into design requirements and contribute to AI-assisted optimization initiatives, with occasional on-site customer support.

Qualifications

• Bachelor's degree in electrical engineering or related field with 5+ years of hands-on ASIC physical design experience, or a master's degree with 3+ years of experience.
• Proficiency with industry-standard implementation tools such as Synopsys ICC2, Fusion Compiler, or Cadence Innovus, used on real tapeouts.
• Strong scripting and automation skills using TCL, Python, or Perl to build flows and analyze data.
• Solid understanding of advanced-node design challenges at 7nm and below, including FinFET, multi-patterning, electromigration, and tradeoffs.
• Excellent communication and presentation skills to explain timing closure strategies to customers and management.

Responsibilities

• Support customer engagements on advanced-node designs at 7nm, 5nm, and below using Fusion Compiler and ICC2, helping teams hit PPA targets under realistic constraints.
• Develop and enhance physical design methodologies and automation solutions using TCL, Python, and Perl to improve design quality and team efficiency across RTL-to-GDS flow.
• Debug complex physical design challenges including placement, clock tree synthesis, routing, timing closure, and power optimization on FinFET designs with multi-patterning and electromigration constraints.
• Build and deliver methodology recommendations tailored to customer design constraints, process technologies and project timelines.
• Contribute to AI-assisted and machine learning-driven design optimization initiatives and data-driven approaches to solve implementation challenges.
• Collaborate with R&D, product management, and field teams to translate customer pain points into product requirements and feature enhancements.
• Travel to customer sites as needed to provide onsite support, training, and design reviews.

Skills

TCL scripting

Python scripting

Perl scripting

Education

Bachelor's degree in electrical engineering

Master's degree (preferred)

Tools

Synopsys ICC2

Fusion Compiler

Cadence Innovus

Job description

Synopsys, Inc. is seeking an experienced ASIC physical design engineer in San Diego to drive tapeout-ready implementations. You will work on 7nm and below nodes, writing TCL and Python to automate flows, and balancing PPA with schedule and resources.

You will collaborate with R&D and field teams to translate customer needs into design requirements and contribute to AI-assisted optimization initiatives, with occasional on-site customer support.