Senior SoC Digital Design Engineer – Video Codec HW

TikTok; San Jose (CA); Presencial; USD 218.000 - 480.000; Jornada completa

Descripción de la vacante

TikTok is seeking video codec hardware design engineers to design accelerators for advanced video encoding and processing on FPGA and ASIC platforms.

You will collaborate with algorithm, architecture, software, firmware, and hardware teams to build highly scalable video platforms and services, delivering power-efficient, high-performance designs for billions of users. A strong background in Verilog/SystemVerilog and digital front-end is preferred.

Formación

• Bachelor's degree or higher in Microelectronics, Integrated Circuits, Electrical Engineering, or a related field.
• 3+ years of experience in digital front-end design (open to highly promising candidates with less experience).
• Mastery of Verilog/SystemVerilog and a solid foundation in digital circuits.
• Proficiency with mainstream front-end EDA tools (e.g., Spyglass, Design Compiler, PrimeTime).
• Fluent in at least one scripting language (Python, Perl, Tcl, Makefile) for workflow automation.

Responsabilidades

• Architecture Design: Define the architecture of SoC top or subsystems (NoC/CPU/NPU/ISP/Codec) and evaluate PPA during early design phase.
• RTL Implementation: Write high-quality, well-structured RTL code (Verilog/SystemVerilog) and maintain design documentation.
• Front-End Quality Control: Perform Lint, CDC, and RDC checks to ensure code quality and robustness.
• Cross-Functional Collaboration: Work with Verification, Backend, Mid-end teams for synthesis, SDC, STA, and power optimization.
• Low Power Design: Formulate chip low-power strategies, apply Clock Gating and Power Gating, support UPF flow.

Conocimientos

Digital front-end design

RTL design

Educación

Bachelor's degree or higher in Microelectronics, Integrated Circuits, Electrical Engineering, or related field

Herramientas

Verilog/SystemVerilog

Spyglass

Design Compiler

PrimeTime

Descripción del empleo

TikTok is seeking video codec hardware design engineers to design accelerators for advanced video encoding and processing on FPGA and ASIC platforms.

You will collaborate with algorithm, architecture, software, firmware, and hardware teams to build highly scalable video platforms and services, delivering power-efficient, high-performance designs for billions of users. A strong background in Verilog/SystemVerilog and digital front-end is preferred.