SoC Verification Engineer (SystemVerilog/UVM)

TikTok; San Jose (CA); On-site; USD 162,000 - 317,000; Full time

Job summary

TikTok is seeking a video codec verification engineer to design hardware accelerators for encoding/processing within a fast-growing team. You will work on verification environments, test plans, and systems-level verification across FPGA, emulation, and silicon targets.

Applicants should have SystemVerilog/UVM expertise, scripting abilities, and hands-on experience with simulation tools. A bachelor's or higher in a related field is required.

Qualifications

• Bachelor's degree or higher in Microelectronics, CS, Electronic Communications, or related field.
• 1+ years of ASIC/SoC verification experience.
• Expertise in SystemVerilog and UVM; ability to build IP/SoC verification environments.
• Proficient in VCS/Incisive/Questa and Verdi; strong debugging and scripting (Python/Perl/Shell).

Responsibilities

• Develop high-coverage verification plans from architecture specs.
• Build or maintain UVM-based testbenches and components.
• Create and run constrained-random and directed tests; achieve 100% coverage.
• Support gate-level timing sim and FPGA prototyping co-debugging.
• Automate regression tests to improve verification efficiency.

Skills

SystemVerilog

UVM

Python scripting

Debugging

Education

Bachelor's degree or higher

Master's degree preferred

Tools

VCS/Incisive/Questa

Verdi

Job description

TikTok is seeking a video codec verification engineer to design hardware accelerators for encoding/processing within a fast-growing team. You will work on verification environments, test plans, and systems-level verification across FPGA, emulation, and silicon targets.

Applicants should have SystemVerilog/UVM expertise, scripting abilities, and hands-on experience with simulation tools. A bachelor's or higher in a related field is required.