Senior SoC/ASIC Physical Design Architect

Sigmaways Inc; Irvine (CA); On-site; USD 150,000 - 190,000; Full time

Job summary

A leading semiconductor design firm is seeking a Senior SoC/ASIC Physical Design Engineer in Irvine, California. The role involves driving physical design activities to closure while collaborating with RTL and engineering teams. Requirements include a Bachelor’s degree (Master’s preferred) and at least 10 years of experience in ASIC/SoC physical design with expertise in EDA tools. You will focus on optimizing performance, power, and area while leading design closure activities. Competitive salary and benefits offered.

Qualifications

• At least 10 years of experience in ASIC/SoC physical design and flow development.
• Expertise in RTL-to-GDSII design flows including synthesis and place & route.
• Proficient in automation scripting with Python, Tcl, Perl, and bash/csh.

Responsibilities

• Build modern physical design flows using EDA tools and machine learning.
• Perform synthesis, floorplanning, and PDN generation.
• Lead closure activities including STA, noise analysis, and physical verification.

Skills

ASIC/SoC physical design

EDA tool fusion

Python scripting

Power optimization techniques

Collaboration skills

Education

Bachelor’s in Electrical Engineering, Computer Engineering, or Computer Science

Master’s preferred

Tools

Synopsys EDA tools

Job description

A leading semiconductor design firm is seeking a Senior SoC/ASIC Physical Design Engineer in Irvine, California. The role involves driving physical design activities to closure while collaborating with RTL and engineering teams. Requirements include a Bachelor’s degree (Master’s preferred) and at least 10 years of experience in ASIC/SoC physical design with expertise in EDA tools. You will focus on optimizing performance, power, and area while leading design closure activities. Competitive salary and benefits offered.