Senior SoC PD Engineer – Equity & Relocation

Gyga Force; San Jose (CA); Hybrid; USD 120,000 - 150,000; Full time

Benefits offered by this job

Equity

401(k) w/ 3% Match

Comprehensive medical, dental, vision, and life insurance

PTO and paid holidays

Relocation Assistance

H1B Visa Sponsorship (Transfers only)

Job summary

A semiconductor solutions firm is seeking an experienced Senior SoC/ASIC Physical Design Engineer in San Jose or Irvine, CA. The role involves leading chip implementation, refining physical design flows, and collaborating with cross-functional teams. The ideal candidate will have over 10 years of experience in ASIC/SoC design, knowledge of Synopsys tools, and strong PPA optimization skills. This full-time position offers various benefits including equity, medical insurance, and relocation assistance.

Qualifications

• At least 10 years of experience in ASIC/SoC physical design and developing PD flows.
• Strong background in RTL-to-GDSII implementation and final signoff.
• Hands‑on experience with Synopsys tools and solid understanding of their internal behavior.

Responsibilities

• Develop a modern physical design environment using current EDA tool capabilities.
• Handle block-level and top-level implementation tasks.
• Develop and maintain PD methodologies to improve efficiency.
• Collaborate with RTL, DFT, and ASIC design groups.
• Resolve timing and design challenges to ensure milestone completion.

Skills

Physical design flow development

RTL-to-GDSII implementation

Expertise in synthesis

Timing analysis

Scripting and automation

Collaboration across teams

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Synopsys tools

Job description

A semiconductor solutions firm is seeking an experienced Senior SoC/ASIC Physical Design Engineer in San Jose or Irvine, CA. The role involves leading chip implementation, refining physical design flows, and collaborating with cross-functional teams. The ideal candidate will have over 10 years of experience in ASIC/SoC design, knowledge of Synopsys tools, and strong PPA optimization skills. This full-time position offers various benefits including equity, medical insurance, and relocation assistance.