Senior Physical Design Engineer, ASIC Tapeouts

eInfochips (An Arrow Company); San Jose (CA); On-site; USD 150,000 - 170,000; Full time

Benefits offered by this job

401k with matching contributions

Short-term/Long-term disability insurance

Health savings account options

Tuition reimbursement

Job summary

A leading global technology provider in San Jose seeks a mid-senior level Sr. Physical Design Engineer. You will engage in advanced ASIC design activities, integrating high-speed interfaces and managing comprehensive signoff processes while providing technical mentorship. This full-time role offers competitive compensation and a solid benefits package, along with 401k matching, tuition reimbursement, and more.

Qualifications

• At least 8 years of experience in ASIC or related field.
• Bachelor's degree in electrical or computer engineering required.
• Proficiency with industry-standard tools.

Responsibilities

• Netlist to-GDSII implementation and design partitioning.
• Own and drive PnR execution addressing timing and congestion.
• Collaborate with cross-functional teams.

Skills

Expertise in clock gating

Proficient with Synopsys ICC2, Fusion Compiler

Experience in automation scripting with Tcl, Perl, Python

Ability to manage signoff processes

Technical leadership

Education

Bachelor's degree in electrical or computer engineering

Job description

A leading global technology provider in San Jose seeks a mid-senior level Sr. Physical Design Engineer. You will engage in advanced ASIC design activities, integrating high-speed interfaces and managing comprehensive signoff processes while providing technical mentorship. This full-time role offers competitive compensation and a solid benefits package, along with 401k matching, tuition reimbursement, and more.