Principal Physical Design Engineer — Chiplet SoCs

Eliyan; San Francisco (CA); On-site; USD 140,000 - 170,000; Full time

Benefits offered by this job

Excellent benefits

Fun work environment

Job summary

A leading chiplet startup in San Francisco is seeking a Principal Physical Design Engineer to drive the development of advanced ASICs. In this role, you will manage the entire design flow and work collaboratively with industry experts. The ideal candidate will have 8-12 years of experience in ASIC physical design, with a strong focus on power planning and clocking methodologies. This exciting opportunity offers a dynamic work environment with excellent benefits.

Qualifications

• 8 to 12 years ASIC physical design experience from feasibility to tapeout.
• Expert in architecture and package driven planning.
• Strong awareness of EM, IR, PV, and STA.

Responsibilities

• Drive architecture and packaging driven floorplanning.
• Define clocking architecture methodology to optimize performance.
• Establish CTS methodology with specific targets.

Skills

ASIC physical design

Power planning

Signoff and tapeout

Clocking architecture

EM IR analysis

Job description

A leading chiplet startup in San Francisco is seeking a Principal Physical Design Engineer to drive the development of advanced ASICs. In this role, you will manage the entire design flow and work collaboratively with industry experts. The ideal candidate will have 8-12 years of experience in ASIC physical design, with a strong focus on power planning and clocking methodologies. This exciting opportunity offers a dynamic work environment with excellent benefits.