Senior Silicon Packaging Architect: End-to-End Solutions

Intel; Hillsboro (OR); Hybrid; USD 191,000 - 269,000; Full time

Job summary

Intel in Hillsboro, OR is seeking a Silicon Packaging Architect to design end-to-end package solutions meeting electrical, mechanical, thermal, and cost targets. You will oversee packaging development from design to production readiness and collaborate across silicon, hardware, and manufacturing teams.

Ideal candidates bring 9+ years in semiconductor packaging or 6+ with a relevant master's, strong DFM/DOE experience, and proven problem-solving skills.

Qualifications

• Bachelor's degree in mechanical, electrical, or materials science and related field.
• 9+ years hands-on packaging experience.
• Master's degree with 6+ years of hands-on experience.
• PhD with 4+ years of hands-on experience in relevant field.

Responsibilities

• Translate product requirements into detailed package architecture specs.
• Lead trade-off decisions to meet electrical, mechanical, thermal, and reliability targets.
• Collaborate with silicon, hardware, and package leads to deliver outputs and remove roadblocks.
• Oversee packaging development from design to production readiness and drive process improvements.
• Apply expertise to troubleshoot designs and deliver cost-effective solutions.
• Partner with manufacturing for smooth design-to-production transitions and tape-out support.
• Apply DFM principles to optimize manufacturability and production efficiency.
• Maintain and refine technical documentation for development processes.

Skills

Semiconductor packaging architectures

Design for Manufacturing (DFM)

Design of Experiments (DOE)

Troubleshooting package design

Education

Bachelor's degree Mechanical Engineering, Electrical Engineering, Materials Science or related field

Master's degree in a relevant field

PhD in a relevant field

Job description

Intel in Hillsboro, OR is seeking a Silicon Packaging Architect to design end-to-end package solutions meeting electrical, mechanical, thermal, and cost targets. You will oversee packaging development from design to production readiness and collaborate across silicon, hardware, and manufacturing teams.

Ideal candidates bring 9+ years in semiconductor packaging or 6+ with a relevant master's, strong DFM/DOE experience, and proven problem-solving skills.