Packaging Design Architect: Substrate & SiP Expert

Intel Corporation; Phoenix, Northern (AZ, KY); Hybrid; USD 221,000 - 312,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Vacation

Job summary

Intel Corporation in the United States is seeking a Packaging Design Architect to drive end-to-end substrate design from concept through tape-out. You will define design rules, perform routing studies, and collaborate with silicon and hardware teams to optimize silicon-package-board performance and pinout.

With a strong background in semiconductor packaging and 10+ years in package/PCB design, you will resolve DRCs, conduct reviews, and document collateral in the PLM system.

Qualifications

• PhD or master's degree in electrical, chemical, mechanical engineering or materials science.
• 10+ years of depth in package, PCB design, or IC digital design.
• Strong background in design, electrical analysis, and packaging.

Responsibilities

• Drive end-to-end substrate design from concept through tape-out.
• Perform layout, routing studies and rule definition to optimize performance and cost.
• Collaborate with silicon and hardware teams to optimize package performance and pinout.
• Document designs and manage them within the product lifecycle system.

Skills

Electrical analysis

Semiconductor packaging

Design optimization

Problem-solving

Independent work

Communication

Education

PhD/Master’s in electrical or materials engineering

Tools

Mentor

Cadence

SPICE

Ansys

Cadence Allegro

Xpedition

Job description

Intel Corporation in the United States is seeking a Packaging Design Architect to drive end-to-end substrate design from concept through tape-out. You will define design rules, perform routing studies, and collaborate with silicon and hardware teams to optimize silicon-package-board performance and pinout.

With a strong background in semiconductor packaging and 10+ years in package/PCB design, you will resolve DRCs, conduct reviews, and document collateral in the PLM system.