Senior RTL Design Architect (Remote)

Experis Technology Group; San Francisco (CA); Remote; USD 83,000 - 118,000; Part time

Job summary

Experis Technology Group in San Francisco, CA seeks an experienced RTL Designer Engineer for a remote 6-month engagement. You will own micro-architecture definitions, and develop RTL for complex digital blocks, working with DV teams to close issues.

The role requires deep SystemVerilog/Verilog RTL expertise, independent micro-architecture definition, and strong memory controller knowledge. Prior IP integration experience and sign-off flow familiarity are essential.

Qualifications

• Must have strong RTL design expertise in SystemVerilog/Verilog.
• Ability to define micro-architecture independently from high-level specs.
• Solid understanding of memory controllers and digital subsystems.
• Experience with IP integration and block-level ownership.
• Familiarity with sign-off flows including CDC and RDC.
• Ability to operate with minimal supervision.

Responsibilities

• Own micro-architecture definition from high-level functional specifications.
• Develop and implement RTL for complex digital blocks.
• Drive digital block control and IP integration.
• Participate in subsystem-level architecture alignment.
• Support design sign-off activities (CDC, RDC, lint, synthesis readiness).
• Collaborate closely with DV for closure and debug.

Skills

RTL design

SystemVerilog/Verilog

Micro-architecture

Memory controllers

IP integration

CDC/RDC sign-off

Education

MS in Computer Science or EE

Job description

Experis Technology Group in San Francisco, CA seeks an experienced RTL Designer Engineer for a remote 6-month engagement. You will own micro-architecture definitions, and develop RTL for complex digital blocks, working with DV teams to close issues.

The role requires deep SystemVerilog/Verilog RTL expertise, independent micro-architecture definition, and strong memory controller knowledge. Prior IP integration experience and sign-off flow familiarity are essential.