Senior RTL CAD Engineer for AI/TPU Silicon

Google; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google is seeking a Senior Engineer to shape AI/ML hardware acceleration and drive TPU silicon developments. You will lead CAD methodologies, influence RTL design, and guide end-to-end chip design and verification for cutting-edge TPU architecture integrated into AI systems.

You will supervise engineers, manage projects from concept to delivery, and accelerate design throughput for next-generation TPUs and related chips.

Qualifications

• Bachelor's degree or equivalent practical experience.
• 8 years of experience with SystemVerilog, hardware design, automation, and verification.
• 5 years of experience with Computer-aided design (CAD).
• Experience developing tools in Python or C/C++.

Responsibilities

• Lead CAD methodology engineers to enable RTL Design teams.
• Partner with chip project teams to standardize design methodology across projects.
• Evaluate tools for deployment and impact on workflows.
• Collaborate across Google to identify opportunities for improved chip design.
• Participate in design reviews and manage issue resolution and trade-off discussions.

Skills

SystemVerilog

Hardware design

Automation

Design verification

Python

C/C++

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree or PhD in Electrical/Computer Engineering or CS

Tools

CAD

Job description

Google is seeking a Senior Engineer to shape AI/ML hardware acceleration and drive TPU silicon developments. You will lead CAD methodologies, influence RTL design, and guide end-to-end chip design and verification for cutting-edge TPU architecture integrated into AI systems.

You will supervise engineers, manage projects from concept to delivery, and accelerate design throughput for next-generation TPUs and related chips.