Senior RFIC Layout Engineer - Space & RFIC Innovation

SpaceX

United States

Presencial

USD 140.000 - 230.000

Jornada completa

Hace 13 días

Consigue una respuesta de este empleador

Tu currículum y tu carta de presentación, adaptados exactamente a lo que buscan contratar.

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Ventajas ofrecidas por este puesto de trabajo

Employee Stock Purchase Plan
Stock options
Paid vacation and holidays

Descripción de la vacante

SpaceX in the United States seeks a Sr. RFIC Layout Designer to lead the layout discipline for RFIC/mixed-signal designs used in Starlink silicon projects.

You will work closely with IC designers and chip leads on floor planning, power distribution, and tape-out readiness. The role requires strong analog RF layout skills, experience with 22nm+ nodes and frequencies up to 50GHz, and proficiency in scripting (Python/ shell).

Formación

  • Bachelor’s degree in electrical or computer engineering and 5+ years of professional experience as an IC layout designer; OR 8+ years of professional experience with IC layout design in lieu of a degree
  • Experience with high-frequency RF blocks and mixed-signal layouts is preferred.

Responsabilidades

  • Determine chip floor plan with power/ground distribution and pad locations.
  • Estimate layout schedule and identify complexity early.
  • Layout of custom RF and analog blocks focusing on matching and parasitics.
  • Perform DRC, ERC, LVS and resolve errors.
  • Integrate top-level layout with ESD structures and pad assembly; tape-out.
  • Collaborate with EDA vendors to trial new tools and features.
  • Create guides and demos to improve team layout techniques.

Conocimientos

Analog layout
RF layout
Circuit design
Linux
Python
Shell scripting

Educación

Bachelor's degree in Electrical or Computer Engineering
8+ years experience in lieu of degree

Herramientas

EDA tools

Descripción del empleo

SpaceX in the United States seeks a Sr. RFIC Layout Designer to lead the layout discipline for RFIC/mixed-signal designs used in Starlink silicon projects.

You will work closely with IC designers and chip leads on floor planning, power distribution, and tape-out readiness. The role requires strong analog RF layout skills, experience with 22nm+ nodes and frequencies up to 50GHz, and proficiency in scripting (Python/ shell).

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