RFIC Layout Engineer – Advanced RF & Analog

SPACE EXPLORATION TECHNOLOGIES CORP; Hawthorne (CA); On-site; USD 105,000 - 150,000; Full time

Benefits offered by this job

Stock options

401(k) plan

Paid parental leave

Disability insurance

Health, vision, and dental coverage

Paid vacation and holidays

Job summary

SpaceX is seeking an RFIC Layout Designer for the Starshield Silicon program in Hawthorne, CA. You will lead layout for RF/analog blocks, ensuring tight matching and minimal parasitics on multiple silicon projects for space and ground infrastructure.

The role requires strong analog layout skills, experience with 16nm/7nm/VLSI nodes, and proficiency in Python, shell scripting, and Linux. Collaborative, detail-oriented engineers are encouraged to apply.

Qualifications

• Bachelor’s degree in electrical or computer engineering or 3+ years of professional experience with IC layout in lieu of a degree.
• 1+ years of professional experience as an IC layout designer.
• Strong analog layout skills.
• Experience with advanced node IC layouts (16nm/7nm/5nm or below).
• Experience with RF blocks such as LNAs, VCOs, and mixers.

Responsibilities

• Determine chip floor plan with power/ground distribution and pad locations with packaging teams.
• Estimate layout schedule and identify complex areas early.
• Layout custom RF and analog circuits with attention to matching and parasitics.
• Perform DRC/RoC and LVS; fix errors.
• Integrate top-level layout with ESD structures and pad assembly; prepare tape-out and density fill; share GDS with foundry.
• Collaborate with EDA vendors to trial new tools and features.
• Create guides and demos to showcase layout improvements.

Skills

Analog layout

IC layout

Linux

Python

Shell scripting

Version control

Communication skills

Independent problem solving

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

EDA tools

Job description

SpaceX is seeking an RFIC Layout Designer for the Starshield Silicon program in Hawthorne, CA. You will lead layout for RF/analog blocks, ensuring tight matching and minimal parasitics on multiple silicon projects for space and ground infrastructure.

The role requires strong analog layout skills, experience with 16nm/7nm/VLSI nodes, and proficiency in Python, shell scripting, and Linux. Collaborative, detail-oriented engineers are encouraged to apply.