Lead RFIC Layout Engineer – High-Freq Analog

SpaceX; Palo Alto (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

SpaceX is seeking a Sr. RFIC Layout Designer to lead the discipline of layout on multiple silicon projects for Starlink and spacecraft platforms.

You will collaborate with RFIC/mixed-signal designers to lay out custom analog and RFIC designs, driving power/ground strategies and careful parasitic control. Applicants should have 5+ years of IC layout experience or 8+ years without a degree, strong analog RF skills, and proficiency with Linux, scripting, and modern EDA tools.

Qualifications

• Bachelor's degree in electrical or computer engineering or equivalent experience.
• 5+ years of professional IC layout experience; or 8+ years without a degree.
• Strong analog RF layout skills and experience with 22nm/16nm/7nm nodes.

Responsibilities

• Define chip floor plan with power/ground strategies and pad locations with packaging input.
• Estimate layout schedule and identify complex areas early.
• Layout RF and analog blocks focusing on matching and minimizing parasitics.
• Perform DRC, ERC, LVS and fix errors.
• Integrate top-level layout with ESD structures and pads; tape-out readiness.
• Collaborate with EDA vendors to trial new tools and features.
• Create guides and demos to share layout techniques.

Skills

Analog RFIC layout

RF/mixed-signal design

Python scripting

Shell scripting

Linux knowledge

Communication skills

Independent problem solving

Education

Bachelor's degree in electrical or computer engineering

8+ years of IC layout experience in lieu of degree

Tools

EDA tools

GDSII / layout editors

Design for manufacturability (DFM)

Job description

SpaceX is seeking a Sr. RFIC Layout Designer to lead the discipline of layout on multiple silicon projects for Starlink and spacecraft platforms.

You will collaborate with RFIC/mixed-signal designers to lay out custom analog and RFIC designs, driving power/ground strategies and careful parasitic control. Applicants should have 5+ years of IC layout experience or 8+ years without a degree, strong analog RF skills, and proficiency with Linux, scripting, and modern EDA tools.