Senior RFIC Layout Engineer — Analog & RFIC Design Lead

SpaceX_Global; Palo Alto (CA); Vor Ort; USD 150.000 - 245.000; Vollzeit

Benefits dieser Stelle

Stock options

401(k) plan

Medical, vision & dental coverage

Paid vacation & holidays

Zusammenfassung

SpaceX in Palo Alto is seeking a Sr. RFIC Layout Designer to lead the RFIC/analog layout discipline for multiple silicon projects destined for space and ground systems.

You will collaborate with RFIC/mixed-signal designers and cross-disciplinary teams to optimize floor plans, power and ground distribution, and tape-out readiness while maintaining stringent matching and parasitic control. The role requires strong analog layout skills, experience with advanced nodes, and a proactive approach to

Qualifikationen

• Bachelor's degree in electrical or computer engineering.
• 5+ years of IC layout experience or 8+ years without a degree.
• Strong analog layout skills and RF/mixed-signal expertise.

Aufgaben

• Determine chip floor plan with power/ground distribution and pad locations.
• Estimate layout schedule and identify complexity early.
• Layout of RF and analog circuits with attention to matching and minimizing parasitics.
• Perform DRC, ERC and LVS checks and fix errors.
• Lead top-level layout integration with ESD structures and pad assembly; prepare tape-out.
• Collaborate with EDA vendors to trial new tools and features.
• Create guides/demos to share layout technique.

Kenntnisse

Analog layout

Advanced nodes (22/16/7/5nm)

RF block layout

VCO/LNA/Mixer layout

Linux basics

Python/Shell/Perl

Revision control

Circuit design knowledge

Ausbildung

Bachelor's degree in electrical or computer engineering

8+ years IC layout experience in lieu of degree

Tools

Linux

Python

Perl

Shell scripting

Jobbeschreibung

SpaceX in Palo Alto is seeking a Sr. RFIC Layout Designer to lead the RFIC/analog layout discipline for multiple silicon projects destined for space and ground systems.

You will collaborate with RFIC/mixed-signal designers and cross-disciplinary teams to optimize floor plans, power and ground distribution, and tape-out readiness while maintaining stringent matching and parasitic control. The role requires strong analog layout skills, experience with advanced nodes, and a proactive approach to