Senior Principal Hardware Verification Architect

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Job summary

Cadence Design Systems, Inc. in San Jose seeks an experienced hardware verification specialist to advance Palladium and Protium platforms.

You will bridge customers with AE/PE and R&D, delivering deep technical support and innovative verification methods for high-speed interfaces like PCIe and CXL. Responsibilities include customizing emulation solutions, driving FW/FPGA acceleration, and presenting technical demos.

Qualifications

• BS or MS with required years of experience as stated in the job ad.
• Deep knowledge of digital design fundamentals, architecture and verification.
• Experience with hardware description languages and/ or C/C++.

Responsibilities

• Collaborate with frontline engineering teams and customers to deploy and optimize advanced protocol solutions on Palladium and Protium platforms.
• Define and develop customer-specific emulation and prototyping requirements, focusing on high-speed interfaces and memory protocols.
• Drive development of acceleration FW + FPGA system solutions and establish verification methodologies.
• Triage and resolve complex issues across hardware/software boundaries, optimizing driver behavior and protocol compliance.
• Lead technical evaluations and develop benchmarks to demonstrate Cadence platforms.
• Create and deliver technical presentations, white papers, and product demonstrations.

Skills

Digital design fundamentals

Computer architecture

System-level verification

C/C++

Verilog/SystemVerilog

Debugging with waveforms

Cross-functional collaboration

Interpersonal communication

Education

BS in Electrical/Computer Engineering or related field

MS in Electrical/Computer Engineering or related field

Tools

HDL tools (Verilog/SystemVerilog)

Job description

Cadence Design Systems, Inc. in San Jose seeks an experienced hardware verification specialist to advance Palladium and Protium platforms.

You will bridge customers with AE/PE and R&D, delivering deep technical support and innovative verification methods for high-speed interfaces like PCIe and CXL. Responsibilities include customizing emulation solutions, driving FW/FPGA acceleration, and presenting technical demos.