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Anysilicon in San Jose, CA is seeking an experienced ASIC Emulation and Verification Engineer to bridge simulation and hardware acceleration. You will bring up complex ASIC IP/SoC designs on Cadence Palladium, convert RTL to emulation-ready models, and run high-speed hardware-accelerated validation.
Responsibilities include mapping RTL onto Palladium, debugging, and collaborating with firmware teams for early bring-up.
Anysilicon in San Jose, CA is seeking an experienced ASIC Emulation and Verification Engineer to bridge simulation and hardware acceleration. You will bring up complex ASIC IP/SoC designs on Cadence Palladium, convert RTL to emulation-ready models, and run high-speed hardware-accelerated validation.
Responsibilities include mapping RTL onto Palladium, debugging, and collaborating with firmware teams for early bring-up.