Principal Product Engineer, System Verification, Emulation (R54514/ad)

Cadence; San Jose (CA); On-site; USD 140,000 - 180,000; Full time

Job summary

Cadence is hiring a Principal Product Engineer for System Verification, Emulation in San Jose, CA. The role involves driving customer engagements, analyzing verification environments, and partnering with R&D to optimize hardware emulation. Candidates should possess a Bachelor’s degree and at least 7 years of experience in RTL verification with proficiency in Verilog/SystemVerilog, C/C++, and Python. Strong analytical and communication skills are essential. This position offers a dynamic environment and the chance to influence product development.

Qualifications

• Minimum of 7 years of experience or 5 years with a Master's degree.
• 6-8 years of hands-on experience in RTL verification.
• Strong fundamentals in digital logic design.
• Working knowledge of simulation-based verification methodologies.
• Effective written and verbal communication skills.

Responsibilities

• Independently drive Palladium hardware emulation engagements with customers.
• Own the technical relationship for assigned customers.
• Analyze complex customer verification environments.
• Work closely with R&D teams.
• Develop and maintain technical collateral.
• Collaborate with field, support, and R&D teams.
• Act as a technical mentor and subject-matter expert.

Skills

RTL verification

Digital logic design

Verilog/SystemVerilog

Linux-based development environments

C/C++

Python

Analytical skills

Problem-solving skills

Education

Bachelor’s degree in Electrical Engineering

Master’s degree in Electrical Engineering

PhD in Electrical Engineering

Tools

EDA workflows

Job description

Cadence Design Systems Inc. is seeking a highly motivated Principal Product Engineer System Verification, Emulation to join our team in San Jose, CA.

As a Principal Product Engineer, System Verification, Emulation, you will independently drive Palladium customer engagements end-to-end, acting as the technical lead for deployment, adoption, and optimization of emulation-based verification flows. You will partner closely with R&D to influence product direction, validate and enable new capabilities, and ensure real-world customer requirements are reflected in Cadence solutions. The objective is to increase customer productivity by delivering scalable, robust, and innovative verification methodologies using cutting-edge emulation technologies.

Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

Job Description

• Independently drive Palladium hardware emulation engagements with customers, from initial deployment through advanced use-case enablement and ongoing optimization
• Own the technical relationship for assigned customers, driving successful adoption and long-term usage of emulation-based verification flows with minimal supervision
• Analyze complex customer verification environments and workflows to identify opportunities for improved scalability, performance, and productivity using hardware‑assisted verification
• Work closely with R&D teams to provide feedback based on real customer use cases, lead enablement and validation of new features/capabilities, and influence the product roadmap
• Develop and maintain high‑quality technical collateral, reference flows, and examples for both customer engagements and internal enablement
• Collaborate with field, support, and R&D teams to reproduce, debug, and resolve complex customer‑reported issues, providing clear technical root‑cause analysis and recommendations
• Act as a technical mentor and subject‑matter expert within the product engineering organization, sharing best practices and lessons learned across engagement

Requirements

• Bachelor’s degree with a minimum of 7 years of experience or Master’s degree in Electrical Engineering with a minimum of 5 years of experience OR PhD with a minimum of 1 year of experience
• 6-8 years of hands‑on experience in RTL verification, with exposure to hardware assisted verification (emulation or prototyping)
• Demonstrated ability to drive customer engagements independently (requirements discovery, technical execution, issue resolution, and stakeholder communication)
• Strong fundamentals in digital logic design and RTL development using Verilog/SystemVerilog
• Experience with simulation‑based verification methodologies, testbench development, and debug
• Working knowledge of Linux‑based development environments and common EDA workflows
• Proficiency in C/C++ and Python for modeling, automation, and analysis
• Strong analytical, problem‑solving, and root‑cause analysis skills
• Effective written and verbal communication skills in English, with the ability to collaborate across multiple teams

Nice to Have

• Course or project work with FPGA based designs and verification

Additional Job Details

• Employment category: CLT
• Employment term: 40 hours/week.
• Location: San Jose, CA.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments.

For more information, access http://www.cadence.com