Senior Hardware Debug & Customer Support Engineer

Cadence; San Jose (CA); On-site; USD 119,000 - 221,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Cadence in California seeks an experienced technical support engineer to partner with customers, field AE teams and R&D for Palladium, Protium and Virtual Protocol products. You will own issue resolution, debug failures, create test cases, and coordinate with internal teams on enhancements and beta testing.

Required BS-EE/CE (MS preferred), 5+ years in design/verification or support, strong HDL and scripting skills, and familiarity with Cadence Palladium. Occasional travel may be required.

Qualifications

• BS-EE/CE required; MS-EE/CE preferred.
• 5+ years experience in design and/or verification of complex digital designs or applications engineering/technical support.
• Proficiency in Verilog, SystemVerilog and VHDL with ability to create test cases.

Responsibilities

• Take ownership and drive to resolution of product issues reported by field AEs and customers.
• Debug customer reported failures, create test cases to replicate failure and log issues with HSV R&D teams.
• Recommend potential workarounds or solutions for customers when needed.
• Test R&D fixes/patches.
• Collaborate with customers and internal groups to specify enhancement requests.
• Test new product features for future software releases or hardware platform, including participation in beta activities.

Skills

Verilog/SystemVerilog/VHDL

HDL Debug Techniques

Unix/Linux scripting

PCIe/USB/Ethernet protocols

UVM/verification

Communication skills

Emulation experience

Design/test case creation

Education

BS Electrical Engineering

MS Electrical Engineering

Tools

Palladium

Job description

Cadence in California seeks an experienced technical support engineer to partner with customers, field AE teams and R&D for Palladium, Protium and Virtual Protocol products. You will own issue resolution, debug failures, create test cases, and coordinate with internal teams on enhancements and beta testing.

Required BS-EE/CE (MS preferred), 5+ years in design/verification or support, strong HDL and scripting skills, and familiarity with Cadence Palladium. Occasional travel may be required.