Senior Package Layout Engineer for High-Speed ASICs (Equity)

NVIDIA; California; On-site; USD 108,000 - 184,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a Senior Package Layout Engineer in California to join our layout team. You will collaborate to implement high-speed, high-density ASIC packages and optimize pinout considering system trades. You will also develop CAD libraries and improve layout productivity.

The role requires CAD/SiP tool experience, strong signal integrity skills, and hands-on substrate layout for wire bond and flip chip packages. Equity and benefits accompany the base compensation.

Qualifications

• Hold a B.S. Electrical Engineering or equivalent experience.
• 2+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology.
• Proven experience in substrate layout of wire bond and flip chip packages, preferred.
• Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager).
• Solid understanding of high-speed design signal integrity practices.
• Experience using Valor is helpful.

Responsibilities

• Collaborate to implement high speed/density ASIC packages.
• Perform substrate breakout patterns for ASIC packages.
• Optimize package pinout incorporating system level trade-offs of pins assignment.
• Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.
• Propose layout design trade-offs to the Technical Package Lead for resolution and implementation.
• Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance.
• Develop symbols and CAD library databases using Cadence APD design tools.
• Develop methodologies to improve layout productivity.

Skills

PCB Layout Experience

High-speed signaling

Signal integrity

Autonomy

Education

B.S. Electrical Engineering

Tools

Cadence APD

SiP tool suite

Constraint Manager

Virtuoso

Calibre

Valor

Job description

NVIDIA is seeking a Senior Package Layout Engineer in California to join our layout team. You will collaborate to implement high-speed, high-density ASIC packages and optimize pinout considering system trades. You will also develop CAD libraries and improve layout productivity.

The role requires CAD/SiP tool experience, strong signal integrity skills, and hands-on substrate layout for wire bond and flip chip packages. Equity and benefits accompany the base compensation.