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NVIDIA Corporation in Santa Clara, California seeks a Senior Package Layout Engineer to contribute to high-speed, high-density IC substrate layouts for NVIDIA products. You will collaborate with the Technical Package Lead and design teams to plan schedules, optimize pinouts, routing, stack-up, power distribution, and trade-offs using Cadence APD/SIP tools.
BS in Electrical Engineering and 5+ years PCB layout for GPUs or similar; wire-bond/flip-chip substrate experience and signal integrity
NVIDIA Corporation in Santa Clara, California seeks a Senior Package Layout Engineer to contribute to high-speed, high-density IC substrate layouts for NVIDIA products. You will collaborate with the Technical Package Lead and design teams to plan schedules, optimize pinouts, routing, stack-up, power distribution, and trade-offs using Cadence APD/SIP tools.
BS in Electrical Engineering and 5+ years PCB layout for GPUs or similar; wire-bond/flip-chip substrate experience and signal integrity