Senior MTS Design Engineer — AI-Driven Packaging

Micron Technology

Boise (ID)

On-site

USD 150,000 - 210,000

Full time

14 days+

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Job summary

Micron Technology is seeking a highly experienced Design Engineer for the Advanced Packaging Technology Development (APTD) team in Boise, Idaho. You will lead electrical, thermal, and thermo-mechanical design for next‑gen semiconductor packages including HBM, W2W, and TSV, collaborating with global teams and leveraging AI to accelerate simulations and data‑driven decisions.

The role requires 15–20 years in engineering with at least 10 in packaging analysis, strong skills in parasitics and

Qualifications

MS or PhD in Electrical Engineering, Materials Science, or related field.
15–20 years of professional experience with at least 10 years in electrical, thermal, and mechanical package analysis and validation in semiconductor packaging.
Strong understanding of thermal impedance and packaging impacts on thermal performance.
Proficiency with DOE and statistical analysis tools (e.g., JMP).
Experience integrating AI/ML tools into engineering workflows and design processes.

Responsibilities

Maintain deep knowledge of semiconductor and advanced electronics packaging (HBM, W2W, COW, Flip Chip, TSV).
Drive design advancements through analysis of parasitics, insertion loss, impedance mismatches across materials and geometries.
Propose short- and long-term solutions to improve thermal performance and align with roadmaps.
Apply Chip-Package Interaction understanding in 2.5D/3D systems and drive validation of mechanical/thermo-mechanical models.
Collaborate with vendors and test labs to design procedures for dielectric constants and decay value characterization.
Integrate AI workflows into package design and evaluation to advance AI-enabled technology development.