MTS Design Engineer, Bonding and Packaging

Micron Technology, Inc; Boise (ID); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking a highly experienced Design Engineer to lead electrical, thermal, and thermo‑mechanical design for next‑generation semiconductor packages such as HBM, W2W, COW, Flip Chip, and TSV.

You will leverage AI and predictive analytics to accelerate simulations and guide data‑driven decisions within the Advanced Packaging R&D group. The role demands 15–20 years in engineering with at least 10 years in package analysis and a strong background in AI/ML integration.

Qualifications

• MS or PhD in Electrical Engineering, Materials Science, Applied Physics, or a related field.
• 15–20 years of professional experience in a relevant engineering area with at least 10 years of direct experience in electrical, thermal, and mechanical package analysis, modeling, and validation of electronic packages in the semiconductor industry or equivalent.
• Proficiency with DOE and statistical analysis (JMP or equivalent).
• Demonstrated ability to integrate AI/ML tools into engineering workflows.

Responsibilities

• Maintain deep subject‑matter knowledge of semiconductor and advanced electronics packaging technologies such as HBM, W2W, COW, Flip Chip, and TSV.
• Drive design advancements through understanding electronic parasitics, insertion loss, and impedance mismatches in interconnects during simulations.
• Propose short and long‑term solutions to improve thermals and initiate thermal improvement roadmaps.
• Apply Chip‑Package Interaction concepts in 2.5D/3D systems and drive validation of mechanical models.
• Work with vendors to design/testing procedures to characterize material dielectric constants and decay values.
• Integrate AI workflows into package design and evaluation; drive AI-enabled technology development.

Skills

Semiconductor packaging

Electrical analysis

Thermal analysis

AI/ML in design

DOE & statistics

Education

MS or PhD in Electrical Engineering, Materials Science, Applied Physics

Tools

Cadence

MATLAB

JMP

Excel

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of cutting‑edge memory and storage solutions that power the AI era. We work hands‑on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production‑ready technologies. We thrive on innovation and collaboration!

We are seeking a highly experienced Design Engineer to enable our APTD team in the Bonding & Packaging Design space. In this role you will drive the electrical, thermal, and thermo‑mechanical design and characterization of next‑generation semiconductor packages, including High Bandwidth Memory (HBM), wafer‑to‑wafer (W2W), Chip‑on‑Wafer (COW), Flip Chip, and Through‑Silicon‑Via (TSV) technologies. You will work closely with global multidisciplinary teams to turn complex simulation results into practical design guidelines and future technology roadmaps. A key focus of the role is leveraging AI and machine learning tools, including generative AI and predictive analytics to improve learning, accelerate simulations, and enable data‑driven decision making within Advanced Packaging R&D.

Job Responsibilities

• Maintain deep subject‑matter knowledge of semiconductor and advanced electronics packaging technologies such as HBM, W2W, COW, Flip Chip, and TSV
• Drive design advancements through a detailed understanding of electrical parasitics, insertion loss, and impedance mismatches of various interconnects as a function of materials, geometries, temperature, and humidity, capturing the corresponding multiphysics mechanisms in simulation
• Propose short and long‑term solutions to improve thermals and kick off projects aligned to thermal improvement roadmaps.
• Apply understanding of Chip‑Package Interactions (CPI) in 2.5D, 3D systems, and internal qual packages; drive sensitivity studies and data collection to validate mechanical and thermo‑mechanical stress/strain structural models; Propose design rules with clear justification and explanation for partnering teams.
• Work with internal/external vendors and testing labs to design and implement effective testing procedures to characterize material dielectric constants and decay values for simulation analysis.
• Integrate AI workflows into package design and package technology evaluations and creation; Drive AI‑enabled technology development for advanced packaging and heterogeneous integration.

Minimum Qualifications

• MS or Ph.D. in Electrical Engineering, Material Science, Applied Physics, or a related field
• 15–20 years of professional experience in a relevant engineering area with at least 10 years of direct experience in electrical, thermal, and mechanical package analysis, modeling, and validation of electronic packages in the semiconductor industry or equivalent.
• Solid understanding of design and process impacts on thermal performance, including the contribution of each layer to total thermal impedance
• Proficiency with engineering tools for Design of Experiments (DOE) and statistical analysis (e.g., JMP or equivalent)
• Demonstrated ability to integrate AI/ML and generative AI tools into engineering workflows, technical assessments, and daily productivity

Preferred Qualifications

• Experience in Signal Integrity analysis and high‑speed package designs, defining characterization (CHAR) plans, and defining DOEs needed to develop package solutions for specific problems
• Familiarity with Cadence layout tools to open and review designs of test vehicles or new memory concepts
• Data acquisition experience and numerical analysis proficiency in MATLAB, Excel, JMP, etc.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.

• Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time‑off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.