Senior Mixed-Signal DDR/SerDes Verification Engineer

QUALCOMM, Inc.; San Diego (CA); Presencial; USD 146.000 - 218.000; Jornada completa

Descripción de la vacante

QUALCOMM, Inc. is seeking a seasoned ASIC/PHY engineer in California to lead bring-up, debugging, and optimization of DDR/SerDes PHYs across post-silicon teams. You will develop firmware, run regression tests, and document outcomes to ensure robust product launches.

You will provide post-release support for PHY-related issues and generate detailed reports while collaborating with cross-functional teams on continuous improvement and data-driven validation strategies.

Formación

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Responsabilidades

• Lead bring-up, debugging, and optimization of DDR/SerDes PHYs across post-silicon teams.
• Proactively identify and resolve issues to ensure successful product launches.
• Provide post-release support for PHY-related customer issues.
• Develop firmware and execute regression testing.
• Generate clear and detailed test reports and documentation.

Conocimientos

DDR/SerDes test development

Firmware development

Python scripting

JEDEC specifications

PHY fundamentals

Signal integrity

Lab instruments

Soldering

Data science / ML for hardware

Automated data pipelines

Educación

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Herramientas

Oscilloscopes

Spectrum analyzers

Logic analyzers

Soldering

Descripción del empleo

QUALCOMM, Inc. is seeking a seasoned ASIC/PHY engineer in California to lead bring-up, debugging, and optimization of DDR/SerDes PHYs across post-silicon teams. You will develop firmware, run regression tests, and document outcomes to ensure robust product launches.

You will provide post-release support for PHY-related issues and generate detailed reports while collaborating with cross-functional teams on continuous improvement and data-driven validation strategies.