DDRSS Validation Engineer (RTL + Silicon Debug)

Qualcomm; San Diego (CA); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Competitive annual discretionary bonus program

Opportunity for annual RSU grants

Job summary

Qualcomm in San Diego is seeking a highly motivated validation engineer with strong debugging and firmware development skills. This role is focused on validating SoC subsystems and will involve driving validation across RTL simulations, emulation platforms, and post-silicon environments.

The ideal candidate will have experience in key areas such as silicon bring-up, firmware development in C, and collaborating across different functional teams. Competitive salary and benefits are offered.

Qualifications

• 6–9 years of experience in SoC validation, design verification, or post-silicon validation.
• Strong debug skills in Verilog/SystemVerilog simulation environments.
• Experience with firmware development in C for embedded systems.

Responsibilities

• Drive end-to-end validation of SoC subsystems across RTL simulation, emulation, and post-silicon environments.
• Perform deep debug of functional issues including root-causing failures and analyzing silicon failures.
• Develop and maintain production quality firmware in C.

Skills

Debug skills in Verilog/SystemVerilog

Firmware development in C

Silicon bring-up experience

Understanding of memory systems (DDR, cache, interconnect)

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Job description

Company: Qualcomm Technologies, Inc.

Job Area: Engineering Group > ASICS Engineering

General Summary

Role Overview: We are seeking a highly motivated validation engineer with strong debugging and firmware development skills to support next‑generation SoC platforms. This role spans pre‑silicon verification, emulation, and post‑silicon validation, with a focus on deep debug in RTL/Verilog environments and hands‑on silicon bring‑up.

Key Responsibilities

• Drive end‑to‑end validation of SoC subsystems (DDR, memory controller, cache, interconnect) across:
  • RTL simulation (Verilog/SystemVerilog)
  • Emulation platforms
  • Post‑silicon environments
• Perform deep debug of functional issues including:
  • Root‑causing failures in RTL simulations and testbenches
  • Debugging firmware‑driven flows
  • Analyzing silicon failures (timing, stability, performance)
• Develop and maintain production quality firmware in C to:
  • Manage DDRSS IP sequences through init, frequency and power management
  • Enable bring‑up and feature validation
  • Exercise system‑level use cases
  • Support debug and characterization
• Validate firmware across:
  • RTL simulation environments
  • Emulation systems
  • Silicon platforms
• Collaborate cross‑functionally with:
  • Design (RTL/architecture teams)
  • DV teams (testbench and coverage alignment)
  • System and silicon validation teams
• Develop tools, debug infrastructure, and automation to improve:
  • Validation efficiency
  • Data collection and analysis
  • Failure triage and turnaround time

Required Qualifications

• 6–9 years of experience in SoC validation, design verification, or post‑silicon validation
• Strong debug skills in Verilog/SystemVerilog simulation environments
• Experience with firmware development in C for embedded systems
• Hands‑on experience with silicon bring‑up, debug, and validation
• Experience debugging across multiple platforms (simulation, emulation, silicon)
• Solid understanding of:
  • Computer architecture and SoC subsystems
  • Memory systems (DDR, cache, interconnect)

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience

Equal Opportunity

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number for reasonable accommodations.

Pay Range and Benefits

$140,000.00 – $210,000.00. Competitive annual discretionary bonus program and opportunity for annual RSU grants.