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NVIDIA is seeking an experienced Engineer to lead rapid IC packaging development for FA and NPI in Santa Clara, CA. You will drive R&D with internal and external partners, and establish advanced packaging processes to meet turnaround, reliability, and chip-package interaction goals.
The role requires 12+ years in IC packaging, deep knowledge of flip-chip, 2.5D/3D packaging, and familiarity with EDA tools like Cadence Allegro and FEM software (ANSYS/ABAQUS). Equity and benefits are included.
NVIDIA is seeking an experienced Engineer to lead rapid IC packaging development for FA and NPI in Santa Clara, CA. You will drive R&D with internal and external partners, and establish advanced packaging processes to meet turnaround, reliability, and chip-package interaction goals.
The role requires 12+ years in IC packaging, deep knowledge of flip-chip, 2.5D/3D packaging, and familiarity with EDA tools like Cadence Allegro and FEM software (ANSYS/ABAQUS). Equity and benefits are included.