Senior IC Layout Designer for Advanced Node Tapeouts

Encore Semi Llc; Sunnyvale (CA); On-site; USD 90,000 - 110,000; Full time

Benefits offered by this job

PTO 15 days

Holidays 10

Medical benefits

Dental & Vision

Life Insurance

401k

Tuition reimbursement

Job summary

Encore Semi, Inc. in Sunnyvale, CA seeks a Senior IC Layout Designer to join a skilled semiconductor team delivering digital and mixed-signal IC layouts at advanced nodes. You’ll perform floorplanning, placement, routing, and DRC/LVS closure, collaborating with designers and process teams to optimize PPA and manufacturability.

We offer a competitive hourly rate of $65–$80, benefits, and bonus opportunities. US work authorization is required.

Qualifications

• 7+ years of hands-on IC layout design experience in advanced semiconductor technologies.
• Strong expertise with industry-standard EDA tools such as Cadence Virtuoso, Synopsys tools, or equivalent platforms.
• Deep understanding of CMOS process technology, physical design concepts, and layout best practices.
• Proven experience achieving DRC/LVS closure and resolving complex physical verification challenges.
• Strong knowledge of parasitic extraction, signal integrity, timing impact, and layout optimization techniques.
• Experience collaborating within cross-functional semiconductor design teams.

Responsibilities

• Develop block-level and full-chip physical layouts for complex digital and mixed-signal IC designs.
• Translate schematics into high-quality layout implementations while maintaining design intent.
• Perform floorplanning, placement, routing, optimization, and layout refinement for PPA (Power, Performance, Area).
• Drive DRC, LVS, and ERC closure, including debugging complex layout and verification issues.
• Analyze and optimize layouts for parasitics, signal integrity, timing, and manufacturability.
• Collaborate with circuit designers, physical verification teams, and foundry partners during tapeout and silicon release activities.
• Support improvements in layout methodologies, automation, and design flows.
• Mentor junior layout engineers and contribute technical expertise across the team.

Skills

7+ years IC layout

EDA tools

CMOS concepts

DRC/LVS/ERC

Parasitics & SI

Cross-functional

FinFET nodes

SoC design

Scripting

Tools

Cadence Virtuoso

Synopsys tools

SKILL/Python/TCL

Job description

Encore Semi, Inc. in Sunnyvale, CA seeks a Senior IC Layout Designer to join a skilled semiconductor team delivering digital and mixed-signal IC layouts at advanced nodes. You’ll perform floorplanning, placement, routing, and DRC/LVS closure, collaborating with designers and process teams to optimize PPA and manufacturability.

We offer a competitive hourly rate of $65–$80, benefits, and bonus opportunities. US work authorization is required.