Senior High-Speed I/O Digital Design Engineer

Samsung Semiconductor

San Jose (CA)

On-site

USD 138,000 - 206,000

Full time

14 days+
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Benefits offered by this job

PTO & holidays
Health and wellness programs
Competitive benefits

Job summary

Samsung Semiconductor’s San Jose location is seeking a senior Electrical Engineer to contribute to High-Speed I/O design for next-generation AI platforms. You will work on die-to-die interfaces, IP development, and verification while collaborating with system and analog teams to ensure robust performance.

Ideal candidates hold a BS in Electrical Engineering with 5+ years, or an MS/PhD with relevant experience, and have hands-on HSIO PHY IP experience plus strong SI/PI knowledge.

Qualifications

  • BS in Electrical Engineering with 5+ years of experience, MS in Electrical Engineering with 3+ years of experience or PhD in Electrical Engineering.
  • Hands-on experience in High-Speed I/O PHY IP development.
  • Strong understanding of high-speed serial interconnect protocols and design trade-offs.
  • Knowledge of Signal Integrity (SI) and Power Integrity (PI) modeling for High-Speed I/O designs.

Responsibilities

  • Develop and deliver HSIO PHY IP blocks for die-to-die interfaces.
  • Contribute to end-to-end digital design flows and verification.
  • Collaborate with system and analog teams to optimize performance.
  • Support design reviews and integrate IP into SoC projects.

Skills

High-Speed I/O
Digital design
SI/PI modeling
SoC protocols (AXI/CHi/PCIE)
End-to-end design flow

Education

BS EE
MS EE
PhD EE

Job description

Samsung Semiconductor’s San Jose location is seeking a senior Electrical Engineer to contribute to High-Speed I/O design for next-generation AI platforms. You will work on die-to-die interfaces, IP development, and verification while collaborating with system and analog teams to ensure robust performance.

Ideal candidates hold a BS in Electrical Engineering with 5+ years, or an MS/PhD with relevant experience, and have hands-on HSIO PHY IP experience plus strong SI/PI knowledge.

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