Staff Engineer, Serdes Analog Design – High‑Speed Interconnects

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 157,000 - 243,000; Full time

Benefits offered by this job

Medical/Dental/Vision/401k

4+ weeks PTO annually

Fertility care stipend

Medical travel support

Onsite cafe and gym

Job summary

Samsung Semiconductor Inc. in San Jose seeks a senior RF/Analog/Serdes SoC designer to develop high‑speed interconnect transceivers, Serdes IPs, and clock generation using cutting‑edge processes. You will collaborate with cross‑functional teams to deliver low‑power, high‑performance circuits and validate them in silicon.

The role requires extensive experience in RF/Analog/Serdes design, EDA tools, and scripting. A strong team player with curiosity and adaptability will thrive.

Qualifications

• 10+ years RF/Analog/Serdes SoC design experience is required.
• Experience with analog/mixed-signal circuits (bandgap, LDO, filters) is required.
• Experience with Serdes IPs: CTLE, DFE, FFE, clock distribution, PI/IQ generation.

Responsibilities

• Design low-power analog and custom digital circuit components using advanced CMOS processes.
• Create schematic from design specs and build test benches to evaluate performance, power, and reliability.
• Supervise layout team to generate LVS/DRC clean layouts; optimize power and performance.

Skills

RF/Analog/Serdes SoC design

Analog/mixed-signal circuits

Serdes IPs: CTLE, DFE, FFE, clock dist

Serdes architecture & high-speed inter

ESD, PLL, clock generation, ADC, DAC

EDA tools: Cadence, Spectre, Totem, EM

Python, Matlab scripting

Team collaboration

Education

Bachelor's with 10+ years experience

Master's with 8+ years experience

PhD with 5+ years experience

Tools

Cadence

Spectre

Totem

EMX

Job description

Samsung Semiconductor Inc. in San Jose seeks a senior RF/Analog/Serdes SoC designer to develop high‑speed interconnect transceivers, Serdes IPs, and clock generation using cutting‑edge processes. You will collaborate with cross‑functional teams to deliver low‑power, high‑performance circuits and validate them in silicon.

The role requires extensive experience in RF/Analog/Serdes design, EDA tools, and scripting. A strong team player with curiosity and adaptability will thrive.