Senior HBM Digital Physical Design Engineer

Micron Technology; Nebraska; On-site; USD 130,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time‑off

Paid holidays

Job summary

Micron Technology is seeking a Digital Physical Design Engineer to lead backend implementation for high‑performance memory products in Nebraska. You will own netlist-to-GDSII flows, drive timing closure, and optimize power integrity across multi‑hierarchy designs.

The role requires strong RTL‑to‑GDSII experience, scripting proficiency, and collaboration with RTL, CAD, and verification teams to meet aggressive PPA targets.

Qualifications

• Bachelor’s degree in EE with knowledge of computer architecture and 7+ years of related experience.
• Master’s degree in EE/CE with 5+ years in related field preferred.
• Strong RTL-to-GDSII understanding and backend timing focus.

Responsibilities

• Own physical design implementation from synthesized netlist to GDSII, including floorplanning, placement, CTS, routing and signoff.
• Use AI-enabled tools in Netlist-to-GDS flow to optimize results.
• Drive timing closure across modes and corners with STA tools.
• Identify and fix congestion, IR drop, EM and PDN/Power integrity issues.
• Refine floorplans, power grids and clocking schemes for high-performance designs.
• Collaborate with RTL, CAD and DFT teams to improve partitioning and constraints.
• Implement low-power techniques including multi-domain power management.
• Perform DRC/LVS/DFM and signoff support; drive ECOs as needed.
• Develop scripts (TCL, Python) to improve flow efficiency and reliability.
• Interface with EDA vendors to evaluate tools and enhancements.

Skills

RTL-to-GDSII flow

Floorplanning

Place & route

Clock distribution

Timing analysis/closure

Power integrity

DVFS & power gating

Multi‑voltage designs

Scripting (TCL, Python, Perl, Shell)

Problem solving

Cross-functional collaboration

Education

Bachelor's degree in EE

Master's degree in EE/CE (desired)

Tools

EDA tools

Job description

Micron Technology is seeking a Digital Physical Design Engineer to lead backend implementation for high‑performance memory products in Nebraska. You will own netlist-to-GDSII flows, drive timing closure, and optimize power integrity across multi‑hierarchy designs.

The role requires strong RTL‑to‑GDSII experience, scripting proficiency, and collaboration with RTL, CAD, and verification teams to meet aggressive PPA targets.