Senior HBM Architecture & SoC Design Engineer

Micron Technology; Folsom (CA); On-site; USD 165,000 - 329,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology is seeking an experienced Custom HBM Architecture and Design Engineer in the United States (Folsom, CA) to advance high‑performance HBM SoC logic die. You will architects, design, verify and integrate RTL blocks, memory sub‑systems, and IP while coordinating across architecture, design, firmware, and product teams.

The role demands 10+ years in related fields, SystemVerilog/Verilog expertise, RTL to GDS experience, and strong scripting with Python or similar.

Qualifications

• Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in a related field.
• Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
• Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and develop sign‑off considerations.
• Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
• Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting).

Responsibilities

• Analyze hardware and software interaction at the system level to identify bottlenecks in existing AI/ML workloads and HBM-based hardware.
• Drive future HBM architecture, design, and technology to address bottlenecks, including implementing proof of concept designs.
• Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
• Architect and design memory sub-systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization.
• Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
• Translate architectural and micro‑architectural specifications into high‑quality RTL implementations.
• Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure.
• Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues.
• Contribute to design documentation, block specifications, and design reviews.
• Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds.

Skills

SystemVerilog/Verilog

RTL design

Python scripting

EDA tools

SoC integration

Education

Bachelor’s or Master’s in EE/CE

Tools

Cadence

Synopsys

Siemens

Job description

Micron Technology is seeking an experienced Custom HBM Architecture and Design Engineer in the United States (Folsom, CA) to advance high‑performance HBM SoC logic die. You will architects, design, verify and integrate RTL blocks, memory sub‑systems, and IP while coordinating across architecture, design, firmware, and product teams.

The role demands 10+ years in related fields, SystemVerilog/Verilog expertise, RTL to GDS experience, and strong scripting with Python or similar.