Senior HBM Design Engineer for AI/HPC Systems

Micron Technology; Nebraska; On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Job summary

Micron Technology in Nebraska is seeking a Senior Design Engineer to design, simulate, and validate next‑gen High‑Bandwidth Memory (HBM) architectures and DRAM blocks. You will collaborate with global design and verification teams to optimize performance, power, area, and reliability for AI/ML, HPC, and graphics products.

The role requires strong background in HBM, 3D stacked memory, TSV signaling, wide I/O interfaces, PHY timing, and mix of analog/digital verification tools such as HSPICE and

Qualifications

• HBM/DRAM design experience required.
• Familiar with 3D stacked memory, TSV signaling, and wide I/O interfaces.
• Experience in function verification and timing analysis.

Responsibilities

• Design, simulate, and validate HBM architectures and DRAM blocks.
• Collaborate with global design/verification teams across engineering functions.
• Support tape-out activities and post-silicon bring‑up.

Skills

HBM architectures

DRAM design

high‑speed I/O

memory‑related designs

3D stacked architectures

TSV signaling

wide I/O interfaces

PHY timing

power integrity

mixed‑signal verification

Education

MS in Computer Engineering

Tools

HSPICE

VerilogHDL

Primesim

Job description

Micron Technology in Nebraska is seeking a Senior Design Engineer to design, simulate, and validate next‑gen High‑Bandwidth Memory (HBM) architectures and DRAM blocks. You will collaborate with global design and verification teams to optimize performance, power, area, and reliability for AI/ML, HPC, and graphics products.

The role requires strong background in HBM, 3D stacked memory, TSV signaling, wide I/O interfaces, PHY timing, and mix of analog/digital verification tools such as HSPICE and