Senior GPU RTL Design Engineer — High-Performance Mobile IP

Samsung Semiconductor; Austin (TX); On-site; USD 124,000 - 208,000; Full time

Benefits offered by this job

Medical benefits

401(k) matching

Tuition assistance

Job summary

Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) are building a center of excellence for IP used in high‑performance mobile GPU designs. We seek a Senior GPU RTL Design Engineer to contribute to RTL blocks and subsystems for next‑generation GPU IPs with a focus on quality, scalability, and production readiness.

In this individual contributor role, you will collaborate with architecture, power, physical design and verification teams, drive microarchitecture

Qualifications

• Experience in semiconductor RTL design for SoC/CPU/GPU architectures.
• Hands-on RTL design with Verilog/SystemVerilog, including microarchitecture development.
• Knowledge of GPU or high‑performance digital design concepts and memory systems.
• Ability to interpret architectural specs and balance performance, power, and area.
• Experience with front-end ASIC design flows including linting, synthesis, timing analysis.

Responsibilities

• Contribute to microarchitecture definition and RTL implementation of complex GPU blocks.
• Translate architectural specifications into efficient, scalable hardware designs.
• Drive RTL development from microarchitecture to integration, debugging and validation.
• Collaborate with architecture, physical design and verification to optimize interfaces and timing.
• Advocate best practices and contribute to improved RTL design methodologies.

Skills

RTL design

Verilog/SystemVerilog

GPU architecture

Microarchitecture development

Synthesis & timing analysis

Front-end ASIC flows

Collaboration

Problem solving

Tools

Synthesis tools

Job description

Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) are building a center of excellence for IP used in high‑performance mobile GPU designs. We seek a Senior GPU RTL Design Engineer to contribute to RTL blocks and subsystems for next‑generation GPU IPs with a focus on quality, scalability, and production readiness.

In this individual contributor role, you will collaborate with architecture, power, physical design and verification teams, drive microarchitecture