Senior GPU RTL Design Engineer – Pixel & Graphics

Samsung Electronics America; San Jose (CA); On-site; USD 139,000 - 208,000; Full time

Job summary

Samsung Electronics America is seeking a Senior Engineer GPU RTL Design Engineer to contribute to the design and development of complex RTL blocks for next-generation mobile GPU IPs, collaborating across hardware and software teams on control, datapath, memory, and fixed-function logic.

This mid-to-senior role focuses on translating architectural specs into RTL using Verilog/SystemVerilog, driving microarchitecture decisions, and ensuring robust, production-ready GPU designs across IP

Qualifications

• 2+ years of RTL design experience for SoC/ GPU architectures.
• Proficiency in Verilog/SystemVerilog RTL development, integration and debugging.
• Experience with GPU/high-performance digital design concepts (control, datapath, memory).
• Experience in front-end ASIC design flows (linting, synthesis, timing analysis).
• Strong written and verbal communication; ability to collaborate in a global team.

Responsibilities

• Contribute to the microarchitecture definition and RTL implementation of complex GPU blocks and subsystems.
• Drive RTL design from microarchitecture through development, integration, and debug.
• Collaborate with verification teams to enable thorough validation and robust designs.
• Address interface definitions, timing, power, performance, and area tradeoffs early in the design cycle.
• Advance best practices by exploring emerging GPU technologies and RTL design methodologies.

Skills

Analytical thinking

Communication skills

Collaboration

Problem solving

Education

Bachelor's degree in Computer Science/Engineering or related field

Master's degree in relevant field

Tools

Verilog/SystemVerilog

Synthesis tools

Job description

Samsung Electronics America is seeking a Senior Engineer GPU RTL Design Engineer to contribute to the design and development of complex RTL blocks for next-generation mobile GPU IPs, collaborating across hardware and software teams on control, datapath, memory, and fixed-function logic.

This mid-to-senior role focuses on translating architectural specs into RTL using Verilog/SystemVerilog, driving microarchitecture decisions, and ensuring robust, production-ready GPU designs across IP