Senior GPU Physical Design Engineer RTL2GDS, High-Freq

MaC VC; San Diego (CA); On-site; USD 204,000 - 306,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Senior Physical Design Engineer in San Diego to execute layout from RTL to GDSII, focusing on high-frequency GPU blocks. You will work with RTL and architecture teams to optimize PPA and drive design automation improvements.

The ideal candidate has extensive experience with synthesis, timing, reliability sign-off, and a deep understanding of sub-micron CMOS cells and memory structures. Collaboration across multi-disciplinary teams is essential.

Qualifications

• 17+ years of direct synthesis and physical design work experience.
• Experience with floorplanning, placement, clock implementation, routing for complex high-frequency designs.
• Proficiency in reading RTL (Verilog/SystemVerilog) and debugging.

Responsibilities

• Perform physical design implementation from RTL to GDS with emphasis on PPA targets.
• Collaborate with RTL/design teams and tool vendors to optimize design flows and methodologies.
• Develop and improve automation for design flows and block closures leading to tape-outs.

Skills

Physical design

RTL design

Verilog/SystemVerilog

Scripting (tcl, python)

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

PhD in Computer Engineering / CS / EE or related

Tools

Synopsys Fusion Compiler

ICC2

Cadence Genus/Innovus

Job description

Qualcomm Technologies, Inc. is seeking a Senior Physical Design Engineer in San Diego to execute layout from RTL to GDSII, focusing on high-frequency GPU blocks. You will work with RTL and architecture teams to optimize PPA and drive design automation improvements.

The ideal candidate has extensive experience with synthesis, timing, reliability sign-off, and a deep understanding of sub-micron CMOS cells and memory structures. Collaboration across multi-disciplinary teams is essential.