GPU ASIC Design & Integration Engineer

Qualcomm; San Diego, Northern (CA, KY); Hybrid; USD 195,000 - 293,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a GPU Design Integration Engineer in San Diego to drive architecture and micro-architecture for integration IP, perform RTL design and synthesis, and verify timing for advanced GPUs.

You will work with software, power, and design teams to deliver high-performance, low-power chipsets. The role requires strong SystemVerilog RTL skills, multi-clock design experience, and leadership capabilities.

Qualifications

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software/Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software/Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software/Hardware Engineering, Systems Engineering, or related work experience.

Responsibilities

• Architecture and micro-architecture of integration IP.
• RTL design and synthesis for ASIC/SoC.
• Logic design, verification, and timing analysis.
• Integration of complex IP to form a complete GPU.
• Collaborate with software, power, and design teams across disciplines.

Skills

ASIC design

SystemVerilog RTL

SoC integration

Timing verification

Synthesis

Multi-clock design

Leadership & communication

Python scripting

Education

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field

Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field

PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field

Tools

Lint

CDC

Synthesis tools

Job description

Qualcomm Technologies, Inc. is seeking a GPU Design Integration Engineer in San Diego to drive architecture and micro-architecture for integration IP, perform RTL design and synthesis, and verify timing for advanced GPUs.

You will work with software, power, and design teams to deliver high-performance, low-power chipsets. The role requires strong SystemVerilog RTL skills, multi-clock design experience, and leadership capabilities.