Senior FPGA Engineer — Spacecraft Hardware & Verification Lead

Woven

Austin (TX)

Hybrid

USD 150,000 - 230,000

Full time

14 days+

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Benefits offered by this job

Stock options
Health insurance
Dental insurance
Vision plan
Retirement plan
Paid time off

Job summary

CesiumAstro is seeking a Senior Staff FPGA Engineer to lead FPGA design and verification for space-based systems. You will define architecture, interfaces, and timing, work with system engineers and software teams, and optimize power and performance across multiple clocks.

The candidate brings HDL-level expertise, experience with radiation-tolerant devices, and a proven track record deploying FPGA designs in space programs. Excellent communication and proposal‑writing skills are essential.

Qualifications

  • BS in Electrical or Computer Engineering from an accredited university.
  • 12 years FPGA design/verification experience at HDL level.
  • Proficiency in VHDL and/or Verilog with radiation-tolerant devices.
  • Experience with high-speed interfaces, power optimization, and DSP basics.
  • Strong written/spoken communication and ability to present to customers.

Responsibilities

  • Lead FPGA design and verification for space programs.
  • Define architecture, interfaces, and timing constraints with cross‑functional teams.
  • Develop FPGA architecture from system requirements and SWAP‑C estimates.
  • Present design reviews to customers and executives; assist in proposals.
  • Mentor junior designers and stay current with new tech.

Skills

FPGA design
VHDL/Verilog
HDL coding
Xilinx Versal
Radiation-tolerant FPGA
Synthesis/Place&Route
ModelSim
Vivado
Lab instrumentation

Education

BS in Electrical Engineering or Computer Engineering
MS a plus

Tools

HDL coder
Git

Job description

CesiumAstro is seeking a Senior Staff FPGA Engineer to lead FPGA design and verification for space-based systems. You will define architecture, interfaces, and timing, work with system engineers and software teams, and optimize power and performance across multiple clocks.

The candidate brings HDL-level expertise, experience with radiation-tolerant devices, and a proven track record deploying FPGA designs in space programs. Excellent communication and proposal‑writing skills are essential.

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