Senior FPGA Engineer - Space-Grade Hardware & DSP

CesiumAstro, Inc.

El Segundo (CA)

Ibrido

USD 140.000 - 168.000

Tempo pieno

14 giorni+

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Vantaggi offerti da questo lavoro

Stock options
Benefits package (health, dental, VIsn

Descrizione del lavoro

CesiumAstro, Inc. is seeking a Senior FPGA Engineer to lead FPGA circuits through full development life cycles for satellites and aerospace platforms.

You will design, verify, test, and deploy HDL-based solutions, including high-speed interfaces and clock domain management, while collaborating with customers and the executive team. Ideal candidates have 6+ years in FPGA design/verification (Verilog/VHDL) and strong communication skills, with hands-on lab instrument experience.

Competenze

  • BS or MS in Electrical or Computer Engineering from an accredited university.
  • Minimum of 6 years of FPGA design/analysis experience at the HDL level.
  • Expertise in FPGA design and verification (Verilog/VHDL) with common tools.
  • Experience with lab instruments: oscilloscopes, spectrum analyzers, RF generators, VSA.
  • Excellent written and verbal communication skills.

Mansioni

  • Own FPGA circuits through all phases of the development process.
  • Design, verification, testing, and deployment at the HDL level.
  • Handle high-speed serial interfaces, data streams, multiple clocks/domains, management interfaces.
  • Present design review materials to customers and the executive team; assist with proposal writing.

Conoscenze

FPGA HDL design
HDL verification
Verilog/VHDL
Communication skills
Lab instrumentation

Formazione

BS or MS in Electrical or Computer Engineering

Strumenti

Xilinx Vivado
ModelSim
HDL Coder

Descrizione del lavoro

CesiumAstro, Inc. is seeking a Senior FPGA Engineer to lead FPGA circuits through full development life cycles for satellites and aerospace platforms.

You will design, verify, test, and deploy HDL-based solutions, including high-speed interfaces and clock domain management, while collaborating with customers and the executive team. Ideal candidates have 6+ years in FPGA design/verification (Verilog/VHDL) and strong communication skills, with hands-on lab instrument experience.

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