Senior DRAM Physical Design Architect — Tapeout & Signoff Lead

Micron Technology; Boise (ID); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off & paid holidays

Competitive benefits package

Job summary

Micron Technology in Boise is seeking a Principal Physical Design Engineer to lead DRAM digital design implementation and signoff from RTL through tapeout, with a strong emphasis on timing closure, power integrity, EMIR analysis, and design reliability.

You will collaborate with architecture, RTL, implementation, CAD, and technology teams to develop scalable physical design solutions that achieve PPA targets for next-generation memory products, while mentoring engineers and driving methodology

Qualifications

• Master's degree in Electrical Engineering (or equivalent) with 8+ years of experience, or Bachelor's with 10+ years in ASIC physical design.
• Flows for physical design including floorplanning, place and route, CTS, timing closure, and signoff.
• Hands-on STA, signal integrity, power integrity, physical verification, and advanced process techs.
• Proficiency with ICC2, Fusion Compiler, PrimeTime, PrimePower, RedHawk (or equivalent).
• Strong scripting skills in Python, Tcl or similar languages.
• Ability to lead multi-functional technical initiatives and influence engineering groups.

Responsibilities

• Lead physical design implementation of complex DRAM digital designs from RTL to tapeout.
• Drive power integrity strategies, including PDN planning, IR drop, EMIR signoff.
• Collaborate with architecture, RTL, CAD, and technology teams to resolve issues at block and chip levels.
• Develop and deploy methodology improvements, automation, and guidelines.
• Mentor engineers and influence future memory product design and signoff approaches.

Skills

Floorplanning

Place and route

Clock tree synthesis

Timing closure

Design signoff

STA

Signal integrity

Power integrity

Physical verification

Advanced process techs

Python

Tcl

Education

Master's degree in Electrical Engineering

Bachelor's degree + 10+ years of experience

Tools

Synopsys ICC2

Fusion Compiler

PrimeTime

PrimePower

RedHawk

Job description

Micron Technology in Boise is seeking a Principal Physical Design Engineer to lead DRAM digital design implementation and signoff from RTL through tapeout, with a strong emphasis on timing closure, power integrity, EMIR analysis, and design reliability.

You will collaborate with architecture, RTL, implementation, CAD, and technology teams to develop scalable physical design solutions that achieve PPA targets for next-generation memory products, while mentoring engineers and driving methodology