Principal RTL Design Engineer - DRAM IP Leadership

Micron Technology, Inc.; Boise (ID); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Paid holidays

Benefits guide

Job summary

Micron Technology, Inc. seeks a Principal RTL Design Engineer to lead RTL development for DRAM digital and mixed-signal IP in Boise, Idaho. You will guide architecture, implementation, and signoff to meet aggressive PPA targets, collaborating with global teams.

You will own pre-silicon RTL IP from micro-architecture through handoff, applying UPF-based low-power design and STA best practices while driving design quality and automation across the flow.

Qualifications

• Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience.
• Ownership of complex RTL/IP development from micro-architecture through handoff to physical design.
• Experience with ASIC low-power design methodologies, including UPF-based power intent and power-aware CDC/RDC.
• Strong knowledge of RTL design, logic synthesis, functional verification, and STA.
• Proficiency in Verilog/SystemVerilog and industry-standard simulation and front-end tools.

Responsibilities

• Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff.
• Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements.
• Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR.
• Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals.
• Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows.

Skills

RTL design

SystemVerilog

Low-power design (UPF)

STA (static timing analysis)

CDC/RDC methodologies

Education

Master’s degree in Electrical Engineering

Bachelor’s degree in Electrical Engineering

Tools

Front-end tools

Synthesis

Job description

Micron Technology, Inc. seeks a Principal RTL Design Engineer to lead RTL development for DRAM digital and mixed-signal IP in Boise, Idaho. You will guide architecture, implementation, and signoff to meet aggressive PPA targets, collaborating with global teams.

You will own pre-silicon RTL IP from micro-architecture through handoff, applying UPF-based low-power design and STA best practices while driving design quality and automation across the flow.